1. Field of the Invention
This invention relates to a focal plane processor for moving target imaging and, more particularly, to such a processor implemented with CTD technology.
2. State of the prior Art
MTI generally implies taking two "snap shots" of a scene and then subtracting one from the other so that all stationary background matter is cancelled, leaving only those scene items which changed between snapshots. Viewed in relation to practical implementations, each snapshot is divided into elemental areas and each elemental area of a first snapshot is compared with an elemental area of the second.
Automatic implementation of an MTI system requires complex circuitry, if for no other reason than the large number of signal samples corresponding to the picture elements of the two "snapshots" which must be processed for detecting differences therebetween and thus to provide an output indicative of moving targets in the scene to which the two "snapshots" correspond.
In the prior art, digital signal processing (DSP) has been utilized in many applications in view of the low cost of the integrated circuits that are available to perform many functions in digital fashion. As compared with analog techniques, DSP has been preferred in that its use of digital implementation has been considered to be preferable in view of cost, weight, flexibility and accuracy considerations. By contrast, the only present advantage of analog techniques is its lower power consumption, which advantage may gradually disappear as technology advances. A further technique known as discrete analog signal processing (DASP) provides an alternative to the aforementioned methods of signal processing and is implemented by sampling at regular intervals an analog signal to provide a series of analog signals or samples, each of which may be operated upon one-at-a-time and have an amplitude containing information on data corresponding to M digital bits, where one bit of resolution in DSP is equivalent to 6dB dynamic range in the analog signal. Experiments have shown that a signal-charge analog packet can be shifted through a typical CTD nearly unattenuated, limited by the size of the holding wells and the minimum detectable output signal.
As more fully described in an article entitled, "Charge Coupled Semiconductor Devices" appearing in Bell System Technical Journal, April 1970 by W. S. Boyle and G. E. Smith, CCD'S sample an analog input signal to provide a series of analog bits to be stored in potential wells created at the surface of a semiconductor and transported along the surface by timing or signals. More particularly, these charges constitute minority carriers stored at the silicon-silicon dioxide interface of MNOS non-memory capacitors and are transferred from capacitor or well to capacitor or well on the same substrate by manipulating the voltages applied across the capacitor.
The present invention relates to the use of such CCD technology for the implementation of a moving target imaging system. Certain special CCD techniques are useful in the implementation of the system of the present invention and, accordingly, are noted briefly at this juncture.
U.S. Pat. No. 3,781,574 -- White et al, assigned to the common assignee, discloses a coherent sampled read-out circuit and signal processor. In one embodiment disclosed in the patent, this circuit and processor are coupled to a CCD shift register. In fact, the circuit and processor of the patent have applicability to any type of device from which an analog charge readout is to be obtained, for purposes of minimizing the degradation of the readout signal and minimizing any noise contribution due to the readout operation. The term coherent sampling as employed in that patent corresponds to a term employed herein of "correlated double sampling" (CDS). The technique of the U.S. Pat. No. 3,781,574 relates principally to output operations and hence may be applied to any system producing an analog charge output such as diode arrays, and CTD, including CCD, systems.
The present invention, moreover, relates to a technique termed "Extended Correlated Double Sampling" (ECDS) which is a form of error correction for cancelling voltage drift and bias errors occurring both at the input and output and within a charge transfer device itself, i.e., as structured between its input and output circuitry.
An early suggestion for achieving cancellation of bias errors and drift consistent with the techniques of extended correlated double sampling is provided in an article entitled, "An Electrically Programmable LSI Transversal Filter for Discrete Analog Signal Processing" (DASP) by Lampe et al, published in Proceedings, CCD Applications Conference 18- 20, September 1973, San Diego, California.
United States Patent Application Ser. No. 507,115, filed Sept. 17, 1974, entitled A PROGRAMMABLE ANALOG TRANSVERSAL FILTER, of Lampe et al and assigned to the common assignee hereof discloses in somewhat greater detail, both as to theory and implementation, a system perforing extended correlated double sampling (ECDS). It will be understood that ECDS provides for correction of voltage drift and bias errors, and therein including such sources of error as threshold nonuniformities across device arrays. Threshold non-uniformities and leakage current non-uniformities, of course, have effects similar to a bias error and, in effect, the output signal errors are indistinguishable as between originating from bias errors or threshold and leakage current non-uniformities.
ECDS techniques are more fully disclosed and developed in the application of Lampe et al filed concurrently herewith, Ser. No. 625,694, entitled EXTENDED CORRELATED DOUBLE SAMPLING FOR CHARGE TRANSFER DEVICES, and assigned to the common assignee hereof, that last referenced application being a continuation-in-part of the above referenced application Ser. No. 507,115 of Lampe et al.